Kill-the-Bit Revisited

General discussions related to the Altair 8800 Clone

Kill-the-Bit Revisited

Postby AltairClone » July 24th, 2019, 9:46 am

An interesting side effect of the design of the 8080 processor is that during 16 bit increment and decrement instructions (INX, DCX), the value of the register pair being updated briefly appears on the address lines as the instruction executes. This has an interesting application in a program like the famous “Kill the Bit” program for Altair 8800.

“Kill the Bit” displays a bit pattern on the upper eight address lights by repeatedly accessing an address for which the upper byte of the address is the bit pattern to display. For example, given the bit pattern to display in register D, the program loops over and over through a sequence of four “load indirect through register D” instructions as shown below.

Code: Select all
LOOP:
 LDAX D
 LDAX D
 LDAX D
 LDAX D
 ...


The same front panel display can be achieved using the INX and DCX instructions, also with the value to display in register D.

Code: Select all
LOOP:
 INX D
 INX D
 INX D
 DCX D
 DCX D
 DCX D
 ...


In both cases, a value of zero in C looks best on the address LEDs because it keeps more of the LEDs in the lower address byte off. The four LDAX instructions take 14us to execute, the six INX/DCX instructions take 15us to execute. By using INX and DCX instructions, the value of C remains the same.

The original Kill-the-Bit program and the INX/DCX version can be found here:

http://altairclone.com/downloads/front_panel/KILLBITS.ASM
http://altairclone.com/downloads/front_panel/KILLBIT2.ASM

Note: You must be running Altair Clone firmware version 1.94 (or newer) to see this effect on the Altair 8800 Clone.

Interestingly, in 8080 processors prior to the 1979 die revision, the 8-bit increment and decrement instructions (INR, DCR) exhibit the same behavior. Even though the per-instruction state table in the 8080 data sheet shows 8-bit inc/dec occurring through the ALU, the 8-bit increments are actually done by the two halves of the 16-bit incrementer. The low registers (C,E,L) are incremented by the lower half of the 16-bit incrementer and always appear on address lines A7-A0. The high registers (B,D,H) are incremented by the upper half of the 16-bit incrementer and always appear on address lines A15-A8. Even though only a single 8-bit register is affected by the INR/DCR instruction, the entire 16-bit register pair appears on the address bus during instruction execution. For example, INR L increments register L by one, however H and L both appear on the address bus during instruction execution.

With the 1979 die revision, the 8-bit increment and decrement instructions use the ALU (as documented in the state table in the data sheet), and therefore, only the 16-bit increment/decrement instructions still affect the address lines. Chips with the 1979 die revision can be identified by the "(c) INTEL '79" stamp on the chip.

Mike
AltairClone
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