64K RAM on Altair FDC+

Discuss construction, troubleshooting, and operation of the Altair 8800c computer

64K RAM on Altair FDC+

Postby AltairClone » June 12th, 2020, 11:43 am

Because of the way the DIP switches are configured on the Altair FDC+, the top 256 bytes of RAM are not available (FF00-FFFF). If this is a problem for something you may be working on, a very simple mod to the FDC+ allows RAM through FFFF.

1) Cut the trace between U9p13 and U8p19
2) Connect U9p13 to U9p14

Prior to the mod, the page address specified by the PROM switches was the start page of the EPROM and last page+1 of RAM. For example, if page FC was specified on the PROM switches, then the EPROM started at FC00 and the last page of RAM was FB (FB00-FBFF).

With the mod, the page address specified by the PROM switches is the start page-1 of the EPROM and the last page of RAM. For example, if page FC is specified on the PROM switches, then the EPROM starts at FD00 and the last page of RAM is FC (FC00-FCFF).

This means that if the PROM switches specify page FF, then the last page of RAM is FF (FF00-FFFF) and a full 64K of RAM can be enabled. In this case, the EPROM is not accessible and the PROM enable switch should be set to "off."

Mike
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Re: 64K RAM on Altair FDC+

Postby toml_12953 » June 12th, 2020, 1:03 pm

AltairClone wrote:Because of the way the DIP switches are configured on the Altair FDC+, the top 256 bytes of RAM are not available (FF00-FFFF). If this is a problem for something you may be working on, a very simple mod to the FDC+ allows RAM through FFFF.

1) Cut the trace between U9p13 and U8p19
2) Connect U9p13 to U9p14

Prior to the mod, the page address specified by the PROM switches was the start page of the EPROM and last page+1 of RAM. For example, if page FC was specified on the PROM switches, then the EPROM started at FC00 and the last page of RAM was FB (FB00-FBFF).

With the mod, the page address specified by the PROM switches is the start page-1 of the EPROM and the last page of RAM. For example, if page FC is specified on the PROM switches, then the EPROM starts at FD00 and the last page of RAM is FC (FC00-FCFF).

This means that if the PROM switches specify page FF, then the last page of RAM is FF (FF00-FFFF) and a full 64K of RAM can be enabled. In this case, the EPROM is not accessible and the PROM enable switch should be set to "off."

Mike


Thank you! I was hoping there was a way to do that. Maybe in a future revision, there could be a DIP switch for it?
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Re: 64K RAM on Altair FDC+

Postby toml_12953 » June 15th, 2020, 5:16 pm

AltairClone wrote:Because of the way the DIP switches are configured on the Altair FDC+, the top 256 bytes of RAM are not available (FF00-FFFF). If this is a problem for something you may be working on, a very simple mod to the FDC+ allows RAM through FFFF.

1) Cut the trace between U9p13 and U8p19
2) Connect U9p13 to U9p14

Prior to the mod, the page address specified by the PROM switches was the start page of the EPROM and last page+1 of RAM. For example, if page FC was specified on the PROM switches, then the EPROM started at FC00 and the last page of RAM was FB (FB00-FBFF).

With the mod, the page address specified by the PROM switches is the start page-1 of the EPROM and the last page of RAM. For example, if page FC is specified on the PROM switches, then the EPROM starts at FD00 and the last page of RAM is FC (FC00-FCFF).

This means that if the PROM switches specify page FF, then the last page of RAM is FF (FF00-FFFF) and a full 64K of RAM can be enabled. In this case, the EPROM is not accessible and the PROM enable switch should be set to "off."

Mike


Now that I've made the change (thanks again BTW!), I also want to change the FDC+ manual. Here are my proposed changes (in bold) Are they complete and correct?

Change 1 Page 5:

The switches labeled “12” to “8” correspond to address lines A12 to A8 and are used to select the 256 byte page -1 within the 8K PROM at which the PROM begins to respond.

Change 2 Page 5:

For example, if you want to use just the 256 byte DBL (disk boot loader) PROM, which in the original Altair is at FF00h-FFFFh, then the DBL code should be programmed into the top 256 bytes of the 8K 27C64 EPROM (1F00h-1FFFh within the 27C64). The PROM address switches A12-A8 should be set to 1 1110, which selects page 1Fh within the 27C64. When combined with A15-A13 as all ones, this gives FF00h as the address at which the PROM starts to respond.

Change 3 Page 5:

As a second example, assume you want to include the 256 byte MBL (multi-boot loader) PROM, the 256 byte TURMON (turnkey monitor) PROM, and a 256 byte Intel hex file loader in addition to the disk boot loader. These additional PROMs are located at FE00h, FD00h, and FC00h respectively. Burn the code of these four PROMs into the address range 1C00h-1FFFh within the 27C64. PROM address switches A12-A8 should be set to 1 1010, which corresponds to page 1Ch in the 27C64. When combined with A15-A13 as all ones, this gives FC00h as the address at which the PROM begins to respond.
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Re: 64K RAM on Altair FDC+

Postby AltairClone » June 16th, 2020, 8:54 am

Change 3 should read, "PROM address switches A12-A8 should be set to 1 1011, which corresponds to page 1Ch in the 27C64."

Also scratch through "Note that the maximum starting address that can be specified for PROM is FF00h. This implies that RAM cannot extend above FF00h (i.e., the last 256 bytes of on-board RAM are not accessible)" in section 2.2

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